1. Field of the Invention
The present invention relates to a semiconductor thin film formed on a substrate having an insulating surface and a semiconductor device using the thin film as an active layer. Particularly, a thin film obtained by crystallizing an amorphous semiconductor thin film including silicon as the main ingredient is used as the semiconductor thin film.
Moreover, the present invention relates to a structure of a semiconductor circuit and an electrooptical device constituted by semiconductor devices such as thin film transistors, and an electronic equipment provided with them.
In the present specification, it is assumed that all of the foregoing thin film transistor, semiconductor circuit, electrooptical device, and electronic equipment are included in the category of xe2x80x9csemiconductor devicexe2x80x9d. That is, any device which can function by using semiconductor characteristics will be referred to as a semiconductor device. Thus, the semiconductor device claimed in the present application includes not only a single component such as a thin film transistor but also a semiconductor circuit and an electrooptical device made of integration of such single components, and an electronic equipment provided with those as parts.
2. Description of the Related Art
In recent years, attention has been paid to a technique for constituting a thin film transistor (TFT) using a semiconductor thin film (with a thickness of about several tens to several hundreds nm) formed on a substrate having an insulating surface. Development of the thin film transistor especially as a switching element for a picture display device (for example, liquid crystal display device) has been hastened.
For example, in the liquid crystal display device, tests have been made to application of TFTs to any electric circuit, such as a pixel matrix circuit for individually controlling pixel regions arranged in matrix, a driving circuit for controlling the pixel matrix circuit, and a logic circuit (arithmetic circuit, memory circuit, clock generator, etc.) for processing data signals from the outside.
In the present circumstances, although a TFT using a noncrystalline silicon film (amorphous silicon film) has been put into practical use, a TFT using a crystalline silicon film (polysilicon film, etc.) is necessary for an electric circuit requiring performance of further high speed operation, such as a driving circuit and a logic circuit.
For example, as a method of forming a crystalline silicon film on a glass substrate, there is well known a technique disclosed in Japanese Patent Unexamined Publication No. Hei. 7-130652 and No. Hei. 8-78329 by the present applicant. According to the technique disclosed in these publications, a catalytic element for promoting crystallization of an amorphous silicon film is used to enable the formation of a crystalline silicon film with excellent crystallinity by a heat treatment at about 500 to 600xc2x0 C. for 4 hours.
Especially, there is also known a technique for obtaining a silicon film having a crystal structure preferable for a device component by nonselectively introducing a catalytic element to control the direction of crystal growth (for example, Japanese Patent Unexamined Publication No. Hei. 7-45519 and No. Hei. 8-213634). This technique is called a lateral growth method. According to the lateral growth method, crystal grain boundaries exist parallel to the growth direction, and when the direction of current of a component is made parallel to the growth direction, the effect of the grain boundaries can be lowered to the lower most limit. As a result, in spite of polycrystal, characteristics comparable to a single crystal material can be also obtained.
The lateral growth method will be described in brief. In the lateral growth method, a mask film of silicon oxide or the like is formed on an amorphous silicon film, and a window is selectively formed therein. A catalytic element is introduced through the window by various methods such as a sputtering method, a vapor phase growth method, and a coating method.
Then heat crystallization is carried out so that crystal growth progresses from an introduced portion of the catalytic element as a starting point. This is because the catalytic element crystallizes the amorphous silicon film while diffusing into the silicon film. In general, as a temperature is high and a time is long, crystallization progresses to a further point. The details are disclosed in the foregoing patent publications.
The present inventors have repeated various trials and errors to improve crystallinity of a crystalline silicon film (called polysilicon film) having crystal grain boundaries. The primary object is to make the crystal grain boundary substantially harmless. That is, the object is to substantially get rid of the crystal grain boundary so that the movement of a carrier (electron or hole) can be made smooth.
The common concept of a semiconductor film disclosed in the foregoing publications is to make crystal grain boundaries substantially harmless. That is, the primary object was to substantially get rid of the crystal grain boundaries so that the movement of a carrier (electron or hole) is made smooth.
Ideally, if higher and longer annealing is carried out, unlimitedly large lateral growth ought to be obtained. However, even by a semiconductor film disclosed in the foregoing publications, it was observed that although the lateral growth region was enlarged, the quality of crystal was totally lowered. It can be said that the crystal quality is insufficient for high speed operation required by a logic circuit. That is, in order to realize a system-on-panel having a built-in logic circuit, the development of a quite novel material, which has not conventionally existed, is desired.
According to the present technique, in the lateral growth method using nickel as a catalytic element, although the maximum width of lateral growth without crystal disturbance is 50 to 60 xcexcm, it is necessary to further increase the lateral growth region to enlarge a component.
In crystallization by conventional annealing, it has been considered that as the asperities of an under film of a semiconductor thin film are large, the occurrence of crystal nuclei becomes easy and a crystal growth time becomes short. It is conceivable that this is because the asperity portions function as nuclei of crystallization. However, the present inventors found that from various experimental results, in the lateral growth method, since the asperities of an under film reduce the quality of crystal and reduce the speed of lateral growth, it is preferable that the asperities are as few as possible.
The feature of the lateral growth method is that it is possible to obtain a semiconductor thin film having crystallinity almost equal to single crystal by causing only the added catalytic elements to be crystal growth nuclei. However, the asperities of the under film are apt to become crystal growth nuclei, and this crystal growth disturbs the crystallinity of the lateral growth region and further blocks the lateral growth. Moreover, the asperities generate distortion or the like in the crystal grain, and causes a shift of the line in a crystal axis, or the like. Besides, since the asperities of the under film of the semiconductor thin film is irregular, there is a fear that crystallinity is different for each place or each substrate.
In general, a quartz substrate is used as a liquid crystal panel, and the asperities of the quartz substrate were observed by an AFM (Atomic Force Microscope). FIGS. 20A and 20B show AFM photographs. FIG. 20A shows a quartz substrate generally used for a liquid crystal panel, which is called sample A in this specification. FIG. 20B shows a quartz substrate with higher quality than sample A, which is called sample B in this specification. The respective observed regions are 10xc3x9710 xcexcm2. 
In sample A, although the root-mean-square surface roughness Rms is about 1 to 1.5 nm, the ten-point-mean roughness Rz is about 10 to 30 nm, and the maximum vertical difference Pxe2x88x92V in the observed region is 20 to 50 nm. Such vertical difference was observed as a recess caved at a sharp angle in a section curve by the AFM of the roughness of sample A. In the photograph shown in FIG. 20A, the recess is confirmed as a black point. The root-mean-square surface roughness Rms is the root of a mean value of a square of a deviation from a reference surface to a specified surface.
On the other hand, in the observation photograph of sample B with high quality shown in FIG. 20B, there is no black point such as in FIG. 20A. With respect to the sample B with high quality, the root-mean-square surface roughness Rms is about 0.4 to 0.6 nm, the ten-point-mean roughness Rz is about 2 to 4 nm, and the maximum vertical difference P-V in the observed region is 4 to 9 nm. As indicated by these values, the depth of a recess of sample B is in an order of several nm, and it is understood that sample B has a very flat surface as compared with sample A.
For example, in the case where a liquid crystal panel is manufactured, as shown in FIG. 19A, an amorphous silicon film 3 is formed on a quartz substrate 1 having a recess 2 with a depth 1 to 1/2 time of the thickness of an active layer as in sample A and is crystallized. However, as shown in FIG. 19B, since the depth of the recess 2 is almost 1 to 1/2 time of the thickness of the amorphous silicon film 3, a recess 5 reflecting the shape of the recess 2 is also formed on the surface of the amorphous silicon film 3. When such an amorphous silicon film is crystallized, the crystal axis is disturbed by this recess 5, so that it is difficult to obtain a film having crystallinity comparable to single crystal. Incidentally, FIG. 19B is an enlarged view showing a vicinity 4 of the recess 2.
Moreover, as shown in FIG. 20A, since the recesses 2 on the surface of the quartz substrate 1 are irregularly present, the crystallinity of the crystalline semiconductor thin film is irregularly disturbed. As a result, characteristics of individual semiconductor components, such as TFTs, on the same substrate become irregular, so that the reliability is damaged.
Thus, even if a driving circuit is constituted by such a semiconductor thin film, required performance can not be still completely satisfied. Especially, in the present circumstances, it is impossible to constitute a high speed logic circuit requiring very high speed operation of from megahertz to gigahertz by conventional TFTs.
The problem due to such a recess can be eliminated if a quartz substrate with high quality, such as sample B shown in FIG. 20B, is used. However, since the substrate becomes expensive, cost performance becomes low.
An object of the present invention is to enable formation of a semiconductor thin film with crystallinity which can be regarded as substantially single crystal even if a low grade substrate as shown in FIG. 20A is used.
That is, an object of the present invention is to solve the foregoing problem and to obtain a high performance semiconductor device such as a high speed logic circuit which can not be manufactured by a conventional TFT, by smoothing and leveling the surface of a substrate on which a semiconductor thin film is formed or the surface of an under film formed on the substrate, to form a semiconductor thin film having crystallinity, which can be substantially regarded as single crystal, on the surface.
Another object of the present invention is to provide a high performance semiconductor device at low a low price by enabling the formation of a semiconductor thin film having crystallinity which can be substantially regarded as single crystal even if a low grade substrate such as sample A shown in FIG. 20A is used.
In order to achieve the above objects, according to the present invention, in a semiconductor device using a semiconductor thin film made of a collective of a plurality of rod-like or flattened rod-like crystals containing silicon as the main ingredient, it is characterized in that the surface of an insulator as an under film of the semiconductor thin film has recesses, and the distance between adjacent ones of the recesses is not smaller than three times as long as the short side of the rod-like or flattened rod-like crystals.
According to another aspect of the present invention, in the foregoing semiconductor device, the distance L between adjacent ones of the recesses is not smaller than 0.3 xcexcm.